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Fix writing to F register

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This commit is contained in:
Kevin Hamacher 2016-05-29 14:34:34 +02:00
parent 47a4b0c720
commit 691147631a
1 changed files with 2 additions and 3 deletions
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5
src/cpu.rs
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@ -79,7 +79,7 @@ impl CPU {
if reg_id == REG_N_A {
self.regs[REG_A] = value;
} else if reg_id == REG_N_F {
self.flags = value;
self.flags = value & 0xF0;
} else if reg_id == REG_N_HL {
let addr: u16 = self.get_pair_value(REG_N_H, REG_N_L);
self.interconnect.write_byte(addr, value);
@ -1192,9 +1192,8 @@ impl CPU {
println!("AND {}", REG_NAMES[reg_id]);
}
self.regs[REG_A] &= self.get_8bit_reg(reg_id);
self.clear_flag(FLAG_N);
let v = self.regs[REG_A];
self.set_clear_flag(FLAG_Z, v == 0);
self.clear_flag(FLAG_N);
self.set_flag(FLAG_H);