diff --git a/src/cpu.rs b/src/cpu.rs
index cfb629e..ddaabab 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -79,7 +79,7 @@ impl CPU {
         if reg_id == REG_N_A {
             self.regs[REG_A] = value;
         } else if reg_id == REG_N_F {
-            self.flags = value;
+            self.flags = value & 0xF0;
         } else if reg_id == REG_N_HL {
             let addr: u16 = self.get_pair_value(REG_N_H, REG_N_L);
             self.interconnect.write_byte(addr, value);
@@ -1192,9 +1192,8 @@ impl CPU {
                         println!("AND {}", REG_NAMES[reg_id]);
                     }
                     self.regs[REG_A] &= self.get_8bit_reg(reg_id);
-                    self.clear_flag(FLAG_N);
-
                     let v = self.regs[REG_A];
+
                     self.set_clear_flag(FLAG_Z, v == 0);
                     self.clear_flag(FLAG_N);
                     self.set_flag(FLAG_H);