From 691147631a0c09bf740f3d3cfb860e4c0d7d799d Mon Sep 17 00:00:00 2001
From: Kevin Hamacher <kevin.hamacher@ruhr-uni-bochum.de>
Date: Sun, 29 May 2016 14:34:34 +0200
Subject: [PATCH] Fix writing to F register

---
 src/cpu.rs | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/cpu.rs b/src/cpu.rs
index cfb629e..ddaabab 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -79,7 +79,7 @@ impl CPU {
         if reg_id == REG_N_A {
             self.regs[REG_A] = value;
         } else if reg_id == REG_N_F {
-            self.flags = value;
+            self.flags = value & 0xF0;
         } else if reg_id == REG_N_HL {
             let addr: u16 = self.get_pair_value(REG_N_H, REG_N_L);
             self.interconnect.write_byte(addr, value);
@@ -1192,9 +1192,8 @@ impl CPU {
                         println!("AND {}", REG_NAMES[reg_id]);
                     }
                     self.regs[REG_A] &= self.get_8bit_reg(reg_id);
-                    self.clear_flag(FLAG_N);
-
                     let v = self.regs[REG_A];
+
                     self.set_clear_flag(FLAG_Z, v == 0);
                     self.clear_flag(FLAG_N);
                     self.set_flag(FLAG_H);