chief/avremu
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

.

Browse Source
This commit is contained in:
Kevin Hamacher 2018-02-11 14:37:57 +01:00
parent a4c521afdf
commit c084d4564f
2 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/cpu.rs
View File

@ -459,12 +459,14 @@ impl CPU {
self.set_register(r, v); self.set_register(r, v);
self.set_clear_flag(StatusFlag::Carry, v == 0xFF); self.set_clear_flag(StatusFlag::Carry, v == 0xFF);
self.set_clear_flag(StatusFlag::Zero, v == 0); self.set_clear_flag(StatusFlag::Zero, v == 0);
self.set_clear_flag(StatusFlag::Negative, v & 0x80 == 0x80);
}, },
Instruction::INC(ref r) => { Instruction::INC(ref r) => {
let v = self.get_register(r).wrapping_add(1); let v = self.get_register(r).wrapping_add(1);
self.set_register(r, v); self.set_register(r, v);
self.set_clear_flag(StatusFlag::Carry, v == 0); self.set_clear_flag(StatusFlag::Carry, v == 0);
self.set_clear_flag(StatusFlag::Zero, v == 0); self.set_clear_flag(StatusFlag::Zero, v == 0);
self.set_clear_flag(StatusFlag::Negative, v & 0x80 == 0x80);
}, },
Instruction::STS16(ref addr, ref r) => { Instruction::STS16(ref addr, ref r) => {
self.ram_write(ram, *addr, self.get_register(r))?; self.ram_write(ram, *addr, self.get_register(r))?;

2
src/decoder.rs
View File

@ -305,7 +305,7 @@ pub fn decode(data: &[u8]) -> Result<Instruction, DecodingError> {
0b0000_0001_0000_0000 => return Ok(Instruction::MOVW((d * 2).into(), (r * 2).into())), 0b0000_0001_0000_0000 => return Ok(Instruction::MOVW((d * 2).into(), (r * 2).into())),
0b0000_0010_0000_0000 => return Ok(Instruction::MULS((d + 16).into(), (r + 16).into())), 0b0000_0010_0000_0000 => return Ok(Instruction::MULS((d + 16).into(), (r + 16).into())),
0b1001_0111_0000_0000 => return Ok(Instruction::SBIW(((d & 0b11) * 2 + 24).into(), K as u16)), 0b1001_0111_0000_0000 => return Ok(Instruction::SBIW(((d & 0b11) * 2 + 24).into(), K as u16)),
0b1110_1111_0000_0000 => return Ok(Instruction::SER((d + 16).into())), 0b1110_1111_0000_0000 => if r == 0b1111 { return Ok(Instruction::SER((d + 16).into())) }
0b1001_1010_0000_0000 => return Ok(Instruction::SBI(A, b)), 0b1001_1010_0000_0000 => return Ok(Instruction::SBI(A, b)),
0b1001_1011_0000_0000 => return Ok(Instruction::SBIS(A, b)), 0b1001_1011_0000_0000 => return Ok(Instruction::SBIS(A, b)),
0b1001_1001_0000_0000 => return Ok(Instruction::SBIC(A, b)), 0b1001_1001_0000_0000 => return Ok(Instruction::SBIC(A, b)),