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A couple more instructions, we read from UART

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This commit is contained in:
Kevin Hamacher 2018-02-11 12:42:39 +01:00
parent 7136fab6af
commit a4c521afdf
2 changed files with 19 additions and 5 deletions
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22
src/cpu.rs
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@ -124,7 +124,6 @@ impl CPU {
} else {
// TODO: Hooks
if addr == chip_definitions::USARTC0_DATA {
// panic!("Tring to write {} via USART!", val);
print!("UART_OUT:{: <3} ({}) ", val, (val as char).escape_debug());
}
ram[addr as usize] = val;
@ -143,11 +142,15 @@ impl CPU {
return Err(CPUError::Exit);
} else if addr == chip_definitions::USARTC0_STATUS {
print!("Trying to read USART flags!");
// return Err(CPUError::Exit);
return Ok(0x20); // Hack :D
if self.pc == 0x5AC {
// USART data check -> Yes, there is indeed data available!
return Ok(0x80);
} else {
return Ok(0x20); // Usart is ready to send.
}
} else if addr == chip_definitions::OSC_STATUS {
// HACK: Osci is set right..
return Ok(2);
return Ok(0x02);
}
Ok(ram[addr as usize])
}
@ -401,6 +404,8 @@ impl CPU {
let t = self.get_register(r);
self.set_clear_flag(StatusFlag::Zero, t == 0);
self.set_clear_flag(StatusFlag::Negative, t & 0x80 == 0x80);
self.set_clear_flag(StatusFlag::SignBit, t & 0x80 == 0x80);
self.clear_flag(StatusFlag::TwosComplementOverflow);
},
Instruction::ANDI(ref d, ref v) => {
let t = self.get_register(d) & *v;
@ -519,6 +524,11 @@ impl CPU {
self.pc += 1;
}
},
Instruction::COM(ref r) => {
// Rd ← $FF - Rd
let rv = 0xFFu8.wrapping_sub(self.get_register(r));
self.set_register(r, rv);
},
Instruction::MUL(ref r, ref d) => {
// R1:R0 ← Rd × Rr(unsigned ← unsigned × unsigned)
let r = self.get_register(r) as u16;
@ -529,6 +539,10 @@ impl CPU {
self.set_clear_flag(StatusFlag::Carry, v & 0x80 == 0x80);
self.set_clear_flag(StatusFlag::Zero, v == 0);
},
Instruction::BST(ref r, ref v) => {
let r = self.get_register(r);
self.set_clear_flag(StatusFlag::BitCopyStorage, r & (1 << *v) != 0);
},
Instruction::NOP => {},
_ => return Err(CPUError::UnimplementedInstruction)
}

2
src/main.rs
View File

@ -30,7 +30,7 @@ fn main() {
rom[0x1d58 + 3] = 0x00;
*/
for _ in 0..280000 {
for _ in 0..2800000 {
let r = cpu.step(&mut rom, &mut ram);
print!("[r28={:02X} r29={:02X}] ", cpu.registers[28], cpu.registers[29]);
println!("{:?}", r);