use super::mbc::MBC;

pub struct MBC1 {
    rom: Box<[u8]>,
    ram: Box<[u8]>,
    bank_no: u8,
    ram_rtc_enabled: bool,
    ram_bank_no: u8,

    rom_banks: u16,

    bank_mode: u8,
    bank_no_high: u8,
}

impl MBC1 {
    pub fn new(rom: Box<[u8]>, ram: Box<[u8]>) -> MBC1 {
        MBC1 {
            rom: rom,
            ram: ram,
            bank_no: 0,
            ram_rtc_enabled: false,
            ram_bank_no: 0,
            rom_banks: 0,
            bank_mode: 0,
            bank_no_high: 0,
        }
    }
}

impl MBC for MBC1 {
    fn read_byte(&self, addr: u16) -> u8 {
        match addr {
            0x0000 ... 0x3FFF => self.rom[addr as usize],
            0x4000 ... 0x7FFF => {
                let addr = addr - 0x4000;
                // println!("BankNo: {:02X}", self.bank_no);
                let abs_addr: usize = addr as usize + self.bank_no as usize * 0x4000;
                let val: u8 = self.rom[abs_addr];
                val
            },
            0xA000 ... 0xBFFF => {
                // TODO: Safty checks? Or let rust handle this?
                let addr = addr - 0xA000;
                if self.ram_bank_no < 4 {
                    println!("Access [{:02X}] {:04X}", self.ram_bank_no, addr);
                    self.ram[self.ram_bank_no as usize * 0x2000 + addr as usize]
                } else {
                    println!("Ignoring RTC read");
                    0
                }
            }
            _ => {
                panic!("Cartride: Unable to read from {:04X}", addr);
            }
        }
    }

    fn write_byte(&mut self, addr: u16, val: u8) {
        match addr {
            0x0000 ... 0x1FFF => {
                match val {
                    0x0A => self.ram_rtc_enabled = true,
                    0x00 => self.ram_rtc_enabled = false,
                    _ => println!("Unknown MBC value {:02X} for {:04X}", val, addr)
                }
            },
            0x2000 ... 0x3FFF => self.bank_no = val & 0x7F,
            0x4000 ... 0x5FFF => {
                // RAM bank select
                match val {
                    0x00 ... 0x03 => self.ram_bank_no = 0, //val,
                    0x08 ... 0x0C => self.ram_bank_no = val, // RTC clock values, TODO
                    _ => panic!("Unknown MBC1 RAM BANK NO: {:02X}", val)
                }

            },
            0x6000 ... 0x7FFF => {
                // Latch clock data, ignore.
            },
            0xA000 ... 0xBFFF => {
                // TODO: Safty checks? Or let rust handle this?
                let addr = addr - 0xA000;
                if self.ram_bank_no < 4 {
                    self.ram[self.ram_bank_no as usize * 0x2000 + addr as usize] = val;
                } else {
                    println!("Ignoring RTC write");
                }
            }
            _ => panic!("MBC1: Writing {:02X} to {:04X} not supported", val, addr),
        }
    }
}