use super::MBC;

enum BankMode {
    RomBankMode,
    RamBankMode,
}

pub struct MBC1 {
    rom: Box<[u8]>,
    ram: Box<[u8]>,
    rom_bank_no: u8,
    bank_mode: BankMode,
    bank_no_high: u8,
    ram_enable: bool,
}

impl MBC1 {
    pub fn new(rom: Box<[u8]>, ram: Box<[u8]>) -> MBC1 {
        MBC1 {
            rom,
            ram,
            rom_bank_no: 1,
            bank_mode: BankMode::RomBankMode,
            bank_no_high: 0,

            ram_enable: false,
        }
    }

    fn active_rom_bank(&self) -> u8 {
        match self.bank_mode {
            BankMode::RomBankMode => self.rom_bank_no | (self.bank_no_high << 5),
            BankMode::RamBankMode => self.rom_bank_no,
        }
    }

    fn active_ram_bank(&self) -> u8 {
        match self.bank_mode {
            BankMode::RomBankMode => 0,
            BankMode::RamBankMode => self.bank_no_high,
        }
    }
}

impl MBC for MBC1 {
    fn dump_ram(&self, file: &str) {
        super::super::write_file(&file, &self.ram).expect("Saving failed");
    }

    fn read_byte(&self, addr: u16) -> u8 {
        match addr {
            0x0000..=0x3FFF => self.rom[addr as usize],
            0x4000..=0x7FFF => {
                let addr = addr - 0x4000;
                let abs_addr: usize = addr as usize + self.active_rom_bank() as usize * 0x4000;
                let val: u8 = self.rom[abs_addr];
                val
            }
            0xA000..=0xBFFF => {
                let addr = addr - 0xA000;
                println!("Access [{:02X}] {:04X}", self.active_ram_bank(), addr);
                self.ram[self.active_ram_bank() as usize * 0x2000 + addr as usize]
            }
            _ => {
                panic!("MBC1: Unable to read from {:04X}", addr);
            }
        }
    }

    fn write_byte(&mut self, addr: u16, val: u8) {
        match addr {
            0x0000..=0x1FFF => match val {
                0x0A => self.ram_enable = true,
                0x00 => self.ram_enable = false,
                _ => println!("Unknown MBC1 value {:02X} for {:04X}", val, addr),
            },
            0x2000..=0x3FFF => {
                if val != 0 {
                    self.rom_bank_no = val & 0x1F;
                } else {
                    self.rom_bank_no = 1; // 0x00 -> 0x01, 0x20 -> 0x21 etc
                }
                println!("MBC1: Selecting bank {:02X}", self.rom_bank_no);
            }
            0x4000..=0x5FFF => {
                // Upper ROM bank / RAM bank select
                self.bank_no_high = val & 3;
            }
            0x6000..=0x7FFF => {
                // Select upper ROM bytes or RAM bytes
                match val {
                    0 => self.bank_mode = BankMode::RomBankMode,
                    1 => self.bank_mode = BankMode::RamBankMode,
                    _ => panic!("Invalid bank mode {:02X}", val),
                }
            }
            0xA000..=0xBFFF => {
                let addr = addr - 0xA000;
                println!("Access [{:02X}] {:04X}", self.active_ram_bank(), addr);
                self.ram[self.active_ram_bank() as usize * 0x2000 + addr as usize] = val;
            }
            _ => panic!("MBC1: Writing {:02X} to {:04X} not supported", val, addr),
        }
    }
}