From f1a5d13830b295fe9394b9a204a13895d8448a47 Mon Sep 17 00:00:00 2001 From: Kevin Hamacher Date: Tue, 15 Mar 2022 21:24:54 +0100 Subject: [PATCH] Fix some clippy warnings --- src/cpu.rs | 42 ++++++++++++++-------- src/decoder.rs | 16 +++++---- src/devices/mod.rs | 13 ++++--- src/devices/oscillator.rs | 76 +++++++++++++++++++++------------------ src/gdbstub.rs | 46 ++++++++++++++---------- src/main.rs | 25 ++++++------- src/regs.rs | 25 +++++++------ 7 files changed, 138 insertions(+), 105 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index 3aa1e51..a5f02a5 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -1,10 +1,10 @@ #![allow(dead_code)] #![allow(unused_variables)] +use chip_definitions; use decoder; use decoder::{IncrementMode, Instruction}; use regs::{GeneralPurposeRegister, GeneralPurposeRegisterPair, StatusFlag}; -use chip_definitions; use devices::DeviceTree; @@ -232,7 +232,11 @@ impl CPU { } // Returns # of ticks the executed instruction took - pub fn step(&mut self, rom: &mut [u8], device_tree: &mut DeviceTree) -> Result { + pub fn step( + &mut self, + rom: &mut [u8], + device_tree: &mut DeviceTree, + ) -> Result { // Instruction fetch if (self.pc as usize) * 2 >= rom.len() { return Err(CPUError::OutOfBoundsException); @@ -316,7 +320,7 @@ impl CPU { IncrementMode::ConstantOffset(o) => base.wrapping_add(u16::from(o)), }; self.ram_write(device_tree, addr, self.get_register(src_reg))?; - }, + } Instruction::LD(ref dst_reg, ref ptr, ref inc_mode) => { let base = self.get_register_pair(ptr); /* @@ -347,17 +351,20 @@ impl CPU { Instruction::ELPM(ref dst_reg, ref inc_mode) => { let Zb = self.get_register_pair(&30u8.into()); // TODO: Only use required bits, other read as zero (according to datasheet) - let Z = - Zb as usize | - (device_tree.read(chip_definitions::IOAdress::RAMPZ as u32) as usize) << 16; + let Z = Zb as usize + | (device_tree.read(chip_definitions::IOAdress::RAMPZ as u32) as usize) << 16; match *inc_mode { IncrementMode::PostIncrement => { self.set_register_pair(&30u8.into(), Zb.wrapping_add(1)); - device_tree.write(chip_definitions::IOAdress::RAMPZ as u32, (Z.wrapping_add(1) >> 16) as u8); - }, + device_tree.write( + chip_definitions::IOAdress::RAMPZ as u32, + (Z.wrapping_add(1) >> 16) as u8, + ); + } _ => { // This instruction does only support None + PostIncrement + panic!("Invalid increment mode for ELPM: {:?}", inc_mode); } } if Z >= rom.len() { @@ -384,13 +391,14 @@ impl CPU { } _ => { // This instruction does only support None + PostIncrement + panic!("Invalid increment mode for LPM: {:?}", inc_mode); } } } Instruction::OUT(ref addr, ref val) => { let val = self.get_register(val); self.ram_write(device_tree, *addr, val)?; - }, + } Instruction::IN(ref reg, ref addr) => { let v = self.ram_read(device_tree, *addr)?; self.set_register(reg, v); @@ -408,7 +416,7 @@ impl CPU { self.push(device_tree, ((ret_to >> 8) & 0xFF) as u8)?; self.push(device_tree, (ret_to & 0xFF) as u8)?; self.pc = (self.pc as i32 + *addr as i32) as u32; - }, + } Instruction::RET => { let mut ret_to = self.pop(device_tree)? as u32; ret_to += (self.pop(device_tree)? as u32) << 8; @@ -422,7 +430,7 @@ impl CPU { Instruction::PUSH(ref reg) => { let v = self.registers[reg.as_usize()]; self.push(device_tree, v)?; - }, + } Instruction::SUBI(ref d, ref v) => { let dv = self.get_register(d); let vres = dv.wrapping_sub(*v); @@ -546,15 +554,19 @@ impl CPU { } Instruction::STS16(ref addr, ref r) => { let rampd = device_tree.read(chip_definitions::IOAdress::RAMPD as u32); - if rampd != 0 { panic!("This is unexpected (for now)"); } + if rampd != 0 { + panic!("This is unexpected (for now)"); + } self.ram_write(device_tree, *addr, self.get_register(r))?; - }, + } Instruction::STS8(ref addr, ref r) => { self.ram_write(device_tree, *addr as u16, self.get_register(r))?; - }, + } Instruction::LDS16(ref r, ref addr) => { let rampd = device_tree.read(chip_definitions::IOAdress::RAMPD as u32); - if rampd != 0 { panic!("This is unexpected (for now)"); } + if rampd != 0 { + panic!("This is unexpected (for now)"); + } let v = self.ram_read(device_tree, *addr)?; self.set_register(r, v); } diff --git a/src/decoder.rs b/src/decoder.rs index 760509f..2cf2503 100644 --- a/src/decoder.rs +++ b/src/decoder.rs @@ -282,7 +282,7 @@ pub fn decode(data: &[u8]) -> Result { if v & 0b1111_1111_0000_0000 == 0b0000_0011_0000_0000 { // FMUL/FMULS/FMULSU/MULSU let d = ((v & 0b0111_0000) >> 4) as u8; - let r = ((v & 0b0111)) as u8; + let r = (v & 0b0111) as u8; let mode = v & 0b1000_1000; match mode { 0b0000_0000 => return Ok(Instruction::MULSU((d + 16).into(), (r + 16).into())), @@ -308,7 +308,7 @@ pub fn decode(data: &[u8]) -> Result { let K = (((v & 0b1100_0000) >> 2) | (v & 0b1111)) as u8; let d = ((v & 0b1111_0000) >> 4) as u8; let r = (v & 0b1111) as u8; - let A = u16::from((v & 0b1111_1000) >> 3); + let A = (v & 0b1111_1000) >> 3; let b = (v & 0b0111) as u8; match v & 0b1111_1111_0000_0000 { 0b1001_0110_0000_0000 => { @@ -318,16 +318,20 @@ pub fn decode(data: &[u8]) -> Result { )) } 0b0000_0001_0000_0000 => return Ok(Instruction::MOVW((d * 2).into(), (r * 2).into())), - 0b0000_0010_0000_0000 => return Ok(Instruction::MULS((d + 16).into(), (r + 16).into())), + 0b0000_0010_0000_0000 => { + return Ok(Instruction::MULS((d + 16).into(), (r + 16).into())) + } 0b1001_0111_0000_0000 => { return Ok(Instruction::SBIW( ((d & 0b11) * 2 + 24).into(), u16::from(K), )) } - 0b1110_1111_0000_0000 => if r == 0b1111 { - return Ok(Instruction::SER((d + 16).into())); - }, + 0b1110_1111_0000_0000 => { + if r == 0b1111 { + return Ok(Instruction::SER((d + 16).into())); + } + } 0b1001_1010_0000_0000 => return Ok(Instruction::SBI(A, b)), 0b1001_1011_0000_0000 => return Ok(Instruction::SBIS(A, b)), 0b1001_1001_0000_0000 => return Ok(Instruction::SBIC(A, b)), diff --git a/src/devices/mod.rs b/src/devices/mod.rs index 69f7ddb..a2271c2 100644 --- a/src/devices/mod.rs +++ b/src/devices/mod.rs @@ -2,9 +2,9 @@ use slog::Logger; +pub mod oscillator; pub mod ram; pub mod usart; -pub mod oscillator; pub trait DeviceImpl { /// addr relative to the start of the device memory map. @@ -16,11 +16,11 @@ pub trait DeviceImpl { pub struct Device { start_addr: u32, addr_len: u32, - device: Box, + device: Box, } impl Device { - pub fn new(device: Box, start_addr: u32, addr_len: u32) -> Self { + pub fn new(device: Box, start_addr: u32, addr_len: u32) -> Self { Self { start_addr: start_addr, addr_len: addr_len, @@ -59,7 +59,7 @@ impl DeviceTree { } fn get_device_for_addr(&mut self, addr: u32) -> Option<&mut Device> { - self.devices.iter_mut().filter(|d| d.handles_addr(addr)).nth(0) + self.devices.iter_mut().find(|d| d.handles_addr(addr)) } pub fn read(&mut self, addr: u32) -> u8 { @@ -74,6 +74,9 @@ impl DeviceTree { if let Some(ref mut d) = self.get_device_for_addr(addr) { return d.write(addr, val); } - warn!(self.log, "Trying to write unmapped I/O: {:08X} <- {:02X}", addr, val); + warn!( + self.log, + "Trying to write unmapped I/O: {:08X} <- {:02X}", addr, val + ); } } diff --git a/src/devices/oscillator.rs b/src/devices/oscillator.rs index 80ccfeb..850081d 100644 --- a/src/devices/oscillator.rs +++ b/src/devices/oscillator.rs @@ -6,15 +6,19 @@ const OSC_CTRL: u32 = 0; const OSC_STATUS: u32 = 1; const OSC_XOSCCTRL: u32 = 2; const OSC_XOSCFAIL: u32 = 3; +/* const OSC_RC32KCAL: u32 = 4; const OSC_PLLCTRL: u32 = 5; const OSC_DFLLCTRL: u32 = 6; +*/ +/* enum PllSrc { RC2M, RC32M, XOSC, } +*/ pub struct Oscillator { log: Logger, @@ -24,11 +28,13 @@ pub struct Oscillator { ctrl: u8, status: u8, xoscctrl: u8, + /* xoscfail: u8, rs32kcal: u8, pllsrc: PllSrc, pllfac: u8, dfllctrl: u8, + */ } impl Oscillator { @@ -40,11 +46,13 @@ impl Oscillator { ctrl: 0, status: 0, xoscctrl: 0, + /* xoscfail: 0, rs32kcal: 0, pllsrc: PllSrc::RC2M, pllfac: 0, dfllctrl: 0, + */ } } } @@ -74,47 +82,45 @@ impl DeviceImpl for Oscillator { OSC_XOSCCTRL => { self.xoscctrl = value & 0xEF; } - OSC_XOSCFAIL => { - - }, + OSC_XOSCFAIL => {} _ => {} } self.reg_values[addr as usize] = value; } -/* - } else if(addr == 0x03) { // XOSCFAIL - XOSCFAIL vreg; - vreg.data = v & 0x03; - // XOSCFDEN - if(!xoscfail_.xoscfden && vreg.xoscfden) { - if(device_->ccpState() & Device::CCP_IOREG) { - xoscfail_.xoscfden = 1; + /* + } else if(addr == 0x03) { // XOSCFAIL + XOSCFAIL vreg; + vreg.data = v & 0x03; + // XOSCFDEN + if(!xoscfail_.xoscfden && vreg.xoscfden) { + if(device_->ccpState() & Device::CCP_IOREG) { + xoscfail_.xoscfden = 1; + } else { + LOGF(ERROR, "cannot set XOSCFAIL.XOSCFDEN: protected by CCP"); + } + } else if(xoscfail_.xoscfden && !vreg.xoscfden) { + LOGF(ERROR, "XOSCFAIL.XOSCFDEN cannot be cleared"); + } + // XOSCFDIF + if(vreg.xoscfdif) { + xoscfail_.xoscfdif = 0; + } + } else if(addr == 0x04) { // RC32KCAL + rc32kcal_ = v; + } else if(addr == 0x05) { // PLLCTRL + if((v >> 6) == 1) { + LOGF(ERROR, "invalid PLLSRC value"); + } else { + pllsrc_ = static_cast(v >> 6); + } + pllfac_ = v & 0x1F; + } else if(addr == 0x06) { // DFLLCTRL + //TODO no check nor handling is made here + dfllctrl_.data = v & 0x03; } else { - LOGF(ERROR, "cannot set XOSCFAIL.XOSCFDEN: protected by CCP"); - } - } else if(xoscfail_.xoscfden && !vreg.xoscfden) { - LOGF(ERROR, "XOSCFAIL.XOSCFDEN cannot be cleared"); + LOGF(ERROR, "I/O write %s + 0x%02X: not writable") % name() % addr; } - // XOSCFDIF - if(vreg.xoscfdif) { - xoscfail_.xoscfdif = 0; - } - } else if(addr == 0x04) { // RC32KCAL - rc32kcal_ = v; - } else if(addr == 0x05) { // PLLCTRL - if((v >> 6) == 1) { - LOGF(ERROR, "invalid PLLSRC value"); - } else { - pllsrc_ = static_cast(v >> 6); - } - pllfac_ = v & 0x1F; - } else if(addr == 0x06) { // DFLLCTRL - //TODO no check nor handling is made here - dfllctrl_.data = v & 0x03; - } else { - LOGF(ERROR, "I/O write %s + 0x%02X: not writable") % name() % addr; -} -*/ + */ } diff --git a/src/gdbstub.rs b/src/gdbstub.rs index d1c6d29..fd1e7fd 100644 --- a/src/gdbstub.rs +++ b/src/gdbstub.rs @@ -1,8 +1,8 @@ +use std; use std::borrow::Cow; use std::collections::HashSet; -use std; -use std::net::{TcpListener, TcpStream}; use std::io::{Read, Write}; +use std::net::{TcpListener, TcpStream}; use slog; @@ -59,7 +59,8 @@ impl GDBPacket { let checksum = u8::from_str_radix( std::str::from_utf8(&checksum).map_err(|_| (GDBPacketError::InvalidFormat))?, 16, - ).map_err(|_| (GDBPacketError::InvalidFormat))?; + ) + .map_err(|_| (GDBPacketError::InvalidFormat))?; let p = GDBPacket { raw_data: decoded_data.clone(), }; @@ -90,8 +91,7 @@ impl GDBPacket { } pub fn to_packet_format(&self) -> Vec { - let mut r = Vec::new(); - r.push(b'$'); + let mut r = vec![b'$']; r.extend(self.escaped_data()); r.push(b'#'); r.extend(format!("{:02X}", self.gen_checksum()).as_bytes()); @@ -103,7 +103,7 @@ fn split_definitions(pkg: &str) -> Vec<(String, String)> { let mut res = Vec::new(); for definition in pkg.split(';') { let mut v = definition.split(':'); - let first = v.nth(0).unwrap().to_string(); + let first = v.next().unwrap().to_string(); res.push((first, v.collect::())); } res @@ -123,9 +123,12 @@ impl<'a> GDBStub<'a> { format!( "T0520:{:02X};21:{:04X};22:{:08X};", self.chip.cpu.sreg, - self.chip.cpu.get_sp(&mut self.chip.device_tree).swap_bytes(), + self.chip + .cpu + .get_sp(&mut self.chip.device_tree) + .swap_bytes(), (2 * self.chip.cpu.pc).swap_bytes() - ).to_string() + ) } fn receive_pkg(&self, stream: &mut TcpStream) -> Result<(String, String), ()> { @@ -167,16 +170,13 @@ impl<'a> GDBStub<'a> { .to_string(); // Split it into command and values. - if response.chars().nth(0).ok_or(())? == 'v' { + if response.chars().next().ok_or(())? == 'v' { // Multibyte word, up to the first ; (or others?). let word_payload = response.split(';').collect::>(); - Ok(( - word_payload[0].to_string(), - word_payload[1..].join(";").to_string(), - )) + Ok((word_payload[0].to_string(), word_payload[1..].join(";"))) } else { Ok(( - response.chars().nth(0).ok_or(())?.to_string(), + response.chars().next().ok_or(())?.to_string(), response.chars().skip(1).collect::(), )) } @@ -194,7 +194,7 @@ impl<'a> GDBStub<'a> { pub fn run(&mut self, port: u16) { let listener = TcpListener::bind(format!("0.0.0.0:{}", port)).unwrap(); - let mut conn = listener.incoming().nth(0).unwrap().unwrap(); + let mut conn = listener.incoming().next().unwrap().unwrap(); info!(self.log, "Debugger attached."); // Main debugging loop. loop { @@ -223,8 +223,10 @@ impl<'a> GDBStub<'a> { ", /*self.chip.ram.len()*/ 0x4000, self.chip.rom.len() - ).to_string().into(); - }, + ) + .to_string() + .into(); + } "C" => response = "01".into(), query => { warn!(self.log, "Unknown query: '{}'", query); @@ -246,7 +248,10 @@ impl<'a> GDBStub<'a> { // SP reg_vals.push(format!( "{:04X}", - self.chip.cpu.get_sp(&mut self.chip.device_tree).swap_bytes() + self.chip + .cpu + .get_sp(&mut self.chip.device_tree) + .swap_bytes() )); // PC reg_vals.push(format!("{:08X}", (2 * self.chip.cpu.pc).swap_bytes())); @@ -334,7 +339,10 @@ impl<'a> GDBStub<'a> { err = true; break; } - self.chip.device_tree.write(addr_i as u32, u8::from_str_radix(&value[2 * i..2 * (i + 1)], 16).unwrap_or(0)); + self.chip.device_tree.write( + addr_i as u32, + u8::from_str_radix(&value[2 * i..2 * (i + 1)], 16).unwrap_or(0), + ); } else { // ROM if addr >= self.chip.rom.len() { diff --git a/src/main.rs b/src/main.rs index 887d221..0d89529 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,8 +1,8 @@ #![allow(non_snake_case)] -use std::path::Path; +use std::fs; use std::io; use std::io::{Read, Write}; -use std::fs; +use std::path::Path; #[macro_use] extern crate slog; @@ -11,13 +11,13 @@ extern crate slog_term; use slog::Drain; -mod cpu; -mod regs; -mod decoder; -mod devices; mod chip; mod chip_definitions; +mod cpu; +mod decoder; +mod devices; mod gdbstub; +mod regs; fn main() { let decorator = slog_term::PlainDecorator::new(std::io::stdout()); @@ -34,11 +34,12 @@ fn main() { std::env::args() .nth(1) .unwrap_or_else(|| "rom.bin".to_string()), - ).unwrap(); + ) + .unwrap(); let mut chip = chip::Chip::new(log.clone(), rom); - if std::env::args().nth(2).unwrap_or("0".to_string()) == "gdb" { + if std::env::args().nth(2).unwrap_or_else(|| "0".to_string()) == "gdb" { // Use GDBStub info!(log, "Enabling GDB backend"); gdbstub::run(log.clone(), &mut chip); @@ -52,14 +53,14 @@ fn main() { } pub fn read_file>(rom_path: P) -> Result, io::Error> { - let mut file = try!(fs::File::open(rom_path)); + let mut file = fs::File::open(rom_path)?; let mut buf = Vec::new(); - try!(file.read_to_end(&mut buf)); + file.read_to_end(&mut buf)?; Ok(buf.into_boxed_slice()) } pub fn write_file>(path: P, data: &[u8]) -> Result<(), io::Error> { - let mut file = try!(fs::File::create(path)); - try!(file.write_all(data)); + let mut file = fs::File::create(path)?; + file.write_all(data)?; Ok(()) } diff --git a/src/regs.rs b/src/regs.rs index 17be577..b41f479 100644 --- a/src/regs.rs +++ b/src/regs.rs @@ -41,9 +41,9 @@ impl fmt::Display for StatusFlag { } } -impl Into for StatusFlag { - fn into(self) -> u8 { - 1 << match self { +impl From for u8 { + fn from(sf: StatusFlag) -> u8 { + 1 << match sf { StatusFlag::GlobalInterruptEnable => 7, StatusFlag::BitCopyStorage => 6, StatusFlag::HalfCarry => 5, @@ -102,15 +102,14 @@ impl From for GeneralPurposeRegister { } } -impl Into for GeneralPurposeRegister { - fn into(self) -> u8 { - self.0 +impl From for u8 { + fn from(r: GeneralPurposeRegister) -> u8 { + r.0 } } - -impl Into for GeneralPurposeRegister { - fn into(self) -> usize { - self.0 as usize +impl From for usize { + fn from(r: GeneralPurposeRegister) -> usize { + r.0.into() } } @@ -146,9 +145,9 @@ impl From for GeneralPurposeRegisterPair { } } -impl Into for GeneralPurposeRegisterPair { - fn into(self) -> u8 { - self.0 +impl From for u8 { + fn from(v: GeneralPurposeRegisterPair) -> u8 { + v.0 } }