This commit is contained in:
Kevin Hamacher 2022-03-15 21:36:48 +01:00
parent 4e4b92abf2
commit 8a45d13e8c
3 changed files with 38 additions and 37 deletions

View File

@ -1,42 +1,37 @@
use cpu::CPU; use cpu::CPU;
use devices; use devices::{oscillator::Oscillator, ram::Ram, usart::Usart, Device, DeviceTree};
use slog; use slog;
pub struct Chip { pub struct Chip {
log: slog::Logger, log: slog::Logger,
pub cpu: CPU, pub cpu: CPU,
pub rom: Box<[u8]>, pub rom: Box<[u8]>,
pub device_tree: devices::DeviceTree, pub device_tree: DeviceTree,
// TODO: List of devices // TODO: List of devices
} }
impl Chip { impl Chip {
pub fn new(log: slog::Logger, rom: Box<[u8]>) -> Chip { pub fn new(log: slog::Logger, rom: Box<[u8]>) -> Chip {
// Internal registers // Internal registers
let internal_regs = devices::ram::RAM::new(log.clone()); let internal_regs = Ram::new(log.clone());
let ram_device = devices::ram::RAM::new(log.clone()); let ram_device = Ram::new(log.clone());
let usart_device = devices::usart::USART::new(log.clone()); let usart_device = Usart::new(log.clone());
let mut dev_tree = devices::DeviceTree::new(log.clone()); let mut dev_tree = DeviceTree::new(log.clone());
// Add RAM and USART // Add RAM and USART
dev_tree.add_device( dev_tree.add_device(Device::new(Box::new(ram_device), 0x2000, 0x2000));
devices::Device::new(Box::new(ram_device), 0x2000, 0x2000) dev_tree.add_device(Device::new(Box::new(internal_regs), 0, 0x40));
); dev_tree.add_device(Device::new(
dev_tree.add_device( Box::new(usart_device),
devices::Device::new(Box::new(internal_regs), 0, 0x40) 0x8A0,
); 0x8A7 - 0x8A0 + 1,
dev_tree.add_device( ));
devices::Device::new(Box::new(usart_device), 0x8A0, 0x8A7 - 0x8A0 + 1) dev_tree.add_device(Device::new(
); Box::new(Oscillator::new(log.clone())),
dev_tree.add_device( 0x50,
devices::Device::new( 0x07,
Box::new(devices::oscillator::Oscillator::new(log.clone())), ));
0x50, 0x07
)
);
Self { Self {
log: log.clone(), log: log.clone(),

View File

@ -2,12 +2,12 @@
use devices::DeviceImpl; use devices::DeviceImpl;
use slog::Logger; use slog::Logger;
pub struct RAM { pub struct Ram {
log: Logger, log: Logger,
data: Box<[u8]>, data: Box<[u8]>,
} }
impl RAM { impl Ram {
pub fn new(log: Logger) -> Self { pub fn new(log: Logger) -> Self {
Self { Self {
log, log,
@ -16,7 +16,7 @@ impl RAM {
} }
} }
impl DeviceImpl for RAM { impl DeviceImpl for Ram {
fn read(&mut self, addr: u32) -> u8 { fn read(&mut self, addr: u32) -> u8 {
self.data[addr as usize] self.data[addr as usize]
} }

View File

@ -1,7 +1,7 @@
use devices::DeviceImpl; use devices::DeviceImpl;
use std;
use slog::Logger; use slog::Logger;
use std;
const USART_DATA: u32 = 0; const USART_DATA: u32 = 0;
const USART_STATUS: u32 = 1; const USART_STATUS: u32 = 1;
@ -11,7 +11,7 @@ const USART_CTRLC: u32 = 5;
const USART_BAUDCTRLA: u32 = 6; const USART_BAUDCTRLA: u32 = 6;
const USART_BAUDCTRLB: u32 = 7; const USART_BAUDCTRLB: u32 = 7;
pub struct USART { pub struct Usart {
/* /*
0x8A0: 'USARTC0_DATA', 0x8A0: 'USARTC0_DATA',
0x8A1: 'USARTC0_STATUS', 0x8A1: 'USARTC0_STATUS',
@ -31,7 +31,7 @@ pub struct USART {
baudctrlb: u8, baudctrlb: u8,
} }
impl USART { impl Usart {
pub fn new(log: Logger) -> Self { pub fn new(log: Logger) -> Self {
Self { Self {
log, log,
@ -45,13 +45,13 @@ impl USART {
} }
} }
impl DeviceImpl for USART { impl DeviceImpl for Usart {
fn read(&mut self, addr: u32) -> u8 { fn read(&mut self, addr: u32) -> u8 {
match addr { match addr {
USART_DATA => { USART_DATA => {
info!(self.log, "USART::Read(), not implemented"); info!(self.log, "USART::Read(), not implemented");
0 0
}, }
USART_STATUS => { USART_STATUS => {
// USART_DREIF_bm 0x20 // USART_DREIF_bm 0x20
/* /*
@ -78,23 +78,28 @@ impl DeviceImpl for USART {
6547 #define USART_RXB8_bp 0 // Receive Bit 8 bit position. 6547 #define USART_RXB8_bp 0 // Receive Bit 8 bit position.
6548 6548
*/ */
info!(self.log, "Checking USART status"); info!(self.log, "Checking Usart status");
self.status | 0x20u8 // Data register empty flag. self.status | 0x20u8 // Data register empty flag.
} }
USART_CTRLA => self.ctrla, USART_CTRLA => self.ctrla,
USART_CTRLB => self.ctrlb, USART_CTRLB => self.ctrlb,
USART_CTRLC => self.ctrlc, USART_CTRLC => self.ctrlc,
USART_BAUDCTRLA => self.baudctrla, USART_BAUDCTRLA => self.baudctrla,
USART_BAUDCTRLB => self.baudctrlb, USART_BAUDCTRLB => self.baudctrlb,
_ => unreachable!() _ => unreachable!(),
} }
} }
fn write(&mut self, addr: u32, value: u8) { fn write(&mut self, addr: u32, value: u8) {
match addr { match addr {
USART_DATA => { USART_DATA => {
info!(self.log, "USART::Write({} / {:?})", value, std::char::from_u32(u32::from(value))); info!(
}, self.log,
"USART::Write({} / {:?})",
value,
std::char::from_u32(u32::from(value))
);
}
USART_STATUS => self.status = value, USART_STATUS => self.status = value,
USART_CTRLA => self.ctrla = value, USART_CTRLA => self.ctrla = value,
USART_CTRLB => self.ctrlb = value, USART_CTRLB => self.ctrlb = value,
@ -104,4 +109,5 @@ impl DeviceImpl for USART {
_ => panic!("Write to usart offset {} <- {:02X}", addr, value), _ => panic!("Write to usart offset {} <- {:02X}", addr, value),
} }
} }
} }